A drawing note that reads "board thickness 1.6 mm" is an incomplete specification. What is missing is not the number. It is three decisions: how the tolerance is expressed, whether the measurement includes soldermask and surface finish, and whether this is a critical dimension. Leave those out and both sides interpret acceptance their own way — usually after the boards are already built.
This article works from the published values on the SKPCB manufacturing tolerances page and capabilities page, covering how to write a thickness tolerance and how it is verified, plus which design freedoms it takes away in return.
1. Which limit actually governs: ±10% or ±0.005"
The published finished thickness tolerance is ±10% or ±0.005", whichever is greater. The tolerance page states that imperial values are authoritative, with metric supplied for convenience, and 1 inch = 25.4 mm.
Both limits are evaluated and the wider one wins:
- On thicker boards, ±10% works out larger than ±0.005", so the percentage governs.
- On thinner boards, ±10% works out smaller than ±0.005", so the absolute floor takes over.
The crossover sits where ±10% equals ±0.005" exactly — nominal 0.050" (1.27 mm). Thicker than that, percentage. Thinner, the absolute floor. Do the arithmetic from this rule, not from a third-party thickness-tolerance chart; the absolute floor differs between fabricators, and using the wrong chart means writing the wrong spec.
One consequence that catches people out: thin boards have looser relative tolerance, not tighter. A 0.4 mm board held to ±0.005" (≈0.13 mm) is running better than ±30% relative. If your design is genuinely thickness-sensitive on a thin board — press-fit connectors, card-edge slots, shielding cavity fit — standard tolerance will not carry you. State a tighter requirement on the drawing and route it through engineering review.
2. Thickness is a stack-up outcome, not an independent knob
Finished thickness is not milled or ground to size at the end. It is the sum of cores, prepreg, copper and soldermask after lamination. That is exactly why thickness tolerance is inherently looser than outline tolerance: the outline is cut by a router bit (board outline ±0.005"), while thickness is stacked material under pressure.
Two design rules follow:
- Fix the stack-up first, then talk about thickness. What you choose is layer count and the core/prepreg combination; thickness is the result. If you need a specific finished thickness, leave the stack-up room to adjust. How to express it: multilayer stack-up guide.
- Copper weight spends thickness budget. On high copper-weight designs the copper itself occupies meaningful thickness, so copper weight and finished thickness get decided together. See copper thickness options and design rules.
If a drawing simultaneously locks layer count, material grade, copper weight and a tight thickness tolerance, those four requirements are probably in conflict. Fabrication can only come back and ask, which costs a review cycle for nothing.
3. Hard thickness boundaries across the three process tiers
The published thickness window on /capabilities/ is 0.2 mm–6.0 mm, but that is the outer envelope of three tiers combined. No single tier gives you the whole range:
| Thickness item | Standard | Advanced | R&D |
|---|---|---|---|
| Min board thickness (w/ soldermask) | 0.6 mm | 0.40 mm | 0.20 mm |
| Max board thickness | 4 mm | 6 mm | 6 mm |
| Layer count | 40 | 64 | 64 |
Two clarifications matter:
- 0.6 / 0.40 / 0.20 mm are the tiered values for "minimum board thickness with soldermask", not a universal minimum for every board type. Flex, rigid-flex and metal-core constructions carry their own limits; these three numbers do not transfer.
- 0.20 mm sits in the R&D tier. Landing in R&D means a narrow process window requiring engineering confirmation of feasibility, not a specification you can order as routine.
Layer count and thickness move together. Above 40 layers you are in Advanced/R&D, and once layer count rises the board gets thicker anyway, so the minimum-thickness row stops being the binding constraint. For choosing layer count: 4 / 6 / 8 layer comparison.
4. A tight thickness tolerance squeezes three capabilities back
This is the calculation worth doing early. Thickness is not only a dimension; it is the denominator for several capabilities.
1. Minimum drilled hole is locked by aspect ratio. Maximum aspect ratio is 10:1 — hole depth over hole diameter. Board thickness *is* the depth for a mechanical through-hole, so the smallest achievable diameter is roughly thickness ÷ 10. Thicker board, larger minimum hole. Asking for a thick board and a small through-hole puts those two requirements in direct conflict at the aspect-ratio line. Mechanical drill minimum is tiered at 0.2 / 0.15 / 0.15 mm and laser holes at 0.1 / 0.075 / 0.075 mm, but aspect ratio is an additional constraint, not one you can route around.
2. Back-drill capability is tiered. Back-drill diameters are 0.50 / 0.35 / 0.25 mm with back-drill control at ±0.05 mm. On thick boards, variation in finished thickness feeds straight into the stub-length error budget: if the thickness itself is uncertain, so is the depth at which you reach a given layer. High-speed designs that are stub-sensitive should raise thickness tolerance and back-drill requirements together.
3. Impedance tolerance. Impedance control is ±5% (±10% standard). Impedance depends on dielectric layer thickness, and dielectric thickness is how total board thickness gets distributed between layers. Thickness tolerance and impedance tolerance cannot both be squeezed to the limit independently — tighten both and fabrication has no adjustment margin left. See impedance tolerance classes.
For how hole quality relates to thickness, see drilled hole quality inspection.
5. Measurement and acceptance: unstated means default
The usual acceptance dispute is about what gets measured. On the same board, measuring bare laminate, measuring over soldermask, and measuring over surface finish give different readings.
The rule is simple: if the drawing does not state the measurement subject and conditions, the published /tolerance/ basis applies. That page cites IPC-6012 acceptability standards as the acceptance basis (referenced by standard name here; no clause values reproduced).
So the drawing should state:
- Nominal finished thickness, with units and the governing basis (write imperial where imperial governs);
- Tolerance form — either the standard "±10% or ±0.005", whichever is greater", or a specific requirement;
- Whether measurement includes soldermask and surface finish;
- Whether it is a critical dimension needing separate recording or first-article confirmation.
To judge how finish and mask affect the reading, cross-check surface finish comparison and the materials library; the overall inspection framework is on quality assurance.
6. When to ask for a tighter tolerance
The tolerance page states that tighter tolerances may be available on request. The right way to use that sentence is to ask only when a real assembly constraint exists, and say where the constraint comes from.
An effective request reads: "board fits a 0.8 mm slot; finished thickness 0.75 mm ±0.05 mm, measured over soldermask." An ineffective one reads: "thickness tolerance as tight as possible." Engineering can evaluate, quote and inspect the first. The second only generates a question back. Anything outside the published window is conditional on engineering review — nothing outside it is automatically accepted.
To get it evaluated, submit the stack-up intent, thickness requirement and assembly constraint together: request a quote and engineering review.
7. Four lines on the drawing is enough
Compressed into drawing language, a complete thickness specification takes four lines:
- Nominal finished thickness with units (note where imperial governs);
- Tolerance: SKPCB standard tolerance, or a stated specific value;
- Measurement condition: includes soldermask? includes surface finish?
- Critical-dimension flag if applicable, plus the source of the assembly constraint if a specific tolerance is requested.
Write those four lines and thickness stops being ambiguous at acceptance.
FAQ
Q1: Is the thickness tolerance ±10% or ±0.005"?
Both are evaluated and the greater one applies. Above roughly 0.050" (1.27 mm) nominal the percentage governs; below it, the ±0.005" floor does. Imperial values are authoritative, metric is for convenience.
Q2: Can you build a 0.2 mm board?
0.20 mm is the R&D-tier value for minimum board thickness with soldermask. It is inside the published window but represents a narrow process window; specific stack-up and material feasibility requires engineering confirmation rather than routine ordering.
Q3: Does thickness tolerance include the soldermask?
Whatever the drawing states. If the drawing is silent, the published /tolerance/ basis applies. State explicitly whether measurement is over soldermask and surface finish — it is the single most common source of acceptance disputes.
Q4: Why is thickness tolerance looser than outline tolerance?
The outline is a routed dimension cut by a bit. Thickness is the accumulated physical result of cores, prepreg, copper and soldermask after lamination. Accumulated tolerance is inherently larger than a single machining tolerance.
Q5: Does board thickness limit minimum hole size?
Yes. Maximum aspect ratio is 10:1 and thickness is the through-hole depth, so the smallest achievable diameter is about one tenth of the thickness. Thick boards with small holes run into this limit.
Q6: Can I specify the tightest thickness tolerance and the tightest impedance tolerance at once?
Not advisable. Impedance depends on dielectric layer thickness, which is how total thickness is distributed. Squeezing both to the limit leaves fabrication no adjustment margin. Decide which one is the real functional requirement first.
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Next step: submit stack-up intent, nominal thickness with tolerance, measurement condition and assembly constraint together — request engineering review and a quote.
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